The invention relates to communication devices, and more particularly to data processing devices containing a processor used in packet-switched communications network.
In packet-switched communication systems data is transferred between system units by packets, also termed PDUs (Protocol Data Units). In some of the system units, the PDUs are subjected to protocol processing. In these system units, it is necessary to store PDUs temporarily before, during or after protocol processing.
In conventional systems, an internal (i.e. “on-chip”) small memory and an external (i.e. “off-chip”) large memory is used for storing PDUs. The small internal memory is expensive but located on the same chip as the protocol processor and thus fast and tightly coupled to protocol processing. The large external memory is inexpensive and provides for sufficient storage capacity needed in cases of high PDU traffic volume. On the other hand, the external memory is accessible only via an external interface resulting in bandwidth limitations and low access speed compared to the internal memory.
Typically, segment memories are used as internal memory and as external memory. Segment memories are arranged in memory segments of a given size. Each segment is associated with a fixed segment address. Segment memories allow for efficient and versatile storage management, mainly because memory segments may be concatenated in lists and freely allocated to different applications.